GLOSSARY

A

Absorption

Assimilation of molecules of one substance directly into another substance. Absorption may be either a physical or a chemical process, physical absorption involving such factors as solubility and vapor-pressure relationships and chemical absorption involving chemical reactions between the absorbed substance and the absorbing medium.

Adsorption

Adhesion of the molecules of liquids, gases, and dissolved substances to the surfaces of solids, opposed to absorption.

ALCVD

Atomic Layer Chemical Vapor Deposition; same as Atomic Layer Deposition ALD

ALD

Atomic Layer Deposition, a deposition method in which deposition of each atomic layer of material is controlled by a pre-deposited layer of precursor; precursors and various components of the film are introduced alternately; method features 100 % step coverage and very good conformality; the method is used for instance in deposition of alternative dielectrics for MOS gates.

ALE

Atomic Layer Epitaxy, atomic layer deposition process which forms epitaxial layer.

Anisotropic Etch

Etch in which etch rate in the direction normal to the surface is much higher than in direction parallel to the surface; no undercutting i.e. lateral distortion of pattern is minimized; needed to define very tight geometries.

Anneal

Heat treatment to which wafer is subjected in order to modify properties of materials/structures processed on its surface or in the bulk.

APCVD

Atmospheric Pressure Chemical Vapor Deposition, process of chemical vapor deposition carried out at atmospheric pressure; typically results in the inferior film quality and conformality of coating as compared to Low Pressure CVD (LPCVD).

Ashing

Removal of volatile substances, such as photoresist, from the surface of a wafer. Usually accomplished by oxidation in a plasma chamber.

B

Barrier Metal

Thin layer of metal, e.g. TiN, sandwiched between other metal and semiconductor (or insulator) to prevent potentially harmful interactions between these two, e.g. spiking.

Batch Process

Process in which several wafers are processed at the same time; opposite to single wafer process; e.g. thermal oxidation in the furnace (either horizontal or vertical) is a prime example of the batch process.

BPSG

Boro-phospho-silicate Glass; silicon dioxide (silica) with boron and phosphorus added to lower temperature at which glass (oxide) starts to flow from about 950 ºC for pure SiO2 to about 500 ºC for BPSG; used to planarize the surface; deposited by CVD.

Bubbler

A container holding a liquid through which some type of inert carrier gas is passed to carry some partial pressure of the liquid into a process tube or a reaction chamber.

C

CAIBE

Chemically Assisted Ion Beam Etching

Carrier Gas

An inert gas used to transport other elements to a process chamber or tube.

CBE

Chemical Beam Epitaxy

Chemical Etching

Process of etching through chemical reaction between chemically reactive etching species and etched material; isotropic and selective.

Chemisorption

Absorption of species (adsorbates) to solid surfaces by the formation of chemical bond between the adsorbate and the surface.

Cleanroom Class

A specification such as the US Federal standard FED-STD-209 that defines the number of particles of a given size and distribution per cubic volume of space for each Class.

CMOS

Complementary metal-oxide semiconductor. A logic family made by combining N-channel and P-channel MOS transistors.

CMP

Chemical Mechanical Polishing, Chemical Mechanical Planarization, method of removing layers of solid by chemical-mechanical polishing carried out for the purpose of surface planarization and definition of metal interconnect pattern; key process in back-end of line IC manufacturing.

Compound Semiconductor

Semiconductor formed using two or more elements; compound semiconductors do not appear in nature; they are synthesized using elements from groups II through VI of the periodic table, e.g. from group III and V (III-V compounds) or II and VI (II-VI compounds).

Cost of Ownership

The total cost a manufacturer incurs to own a piece of capital equipment throughout that equipments lifetime, including initial costs and yearly operating costs.

Cryogenic Pump

High-vacuum pump operating in the pressure range from about 10-3 torr to 10-10 torr; removes gas molecules from vacuum by trapping them on cold surfaces; efficient, clean pumping; commonly used in high-end vacuum equipment in semiconductor manufacturing.

CVD

Chemical Vapor Deposition, a gaseous process that deposits insulating films or metal onto a wafer at elevated temperature. Often, reduced pressure is used to promote the chemical reaction.

D

Diffusion

In microelectronics and photovoltaic manufacturing, diffusion most often refers to a thermal process used to introduce dopants into a semiconductor wafer. The process has largely been replaced by ion implantation.

Dopant

An element that alters the conductivity of a semiconducting material by contributing a free-hole (P-type) or electron (N-type) to the crystal. Boron is commonly used for P-type and phosphorous, arsenic and antimony is used for N-type doping of silicon.

Doping

The introduction of a dopant into a semiconductor to modify its electrical properties by creating a concentration of N or P carriers. Doping is normally accomplished through diffusion or ion implantation processes.

Drain

Heavily doped region in semiconductor substrates located at the end of the channel in Field Effect Transistors; carriers flow out of the transistor through the drain.

DRIE

Deep Reactive Ion Etching; method used to delineate deep geometrical features in silicon; needed to shape MEMS structures.

Dry Etching

Etching process carried out in the gas-phase; can be either purely chemical (plasma etching), purely physical (ion milling) or combination of both (Reactive Ion Etching, RIE).

Dry Pump

Entirely dry (oil vapor-free) roughing (down to the vacuum of about 10-3 torr) pump; common in advanced semiconductor process equipment because it is oil-free; dry screw pump: screw-shaped rotor drives gas molecules out.

E

Epitaxial Layer

A grown crystal layer (usually doped) having the same crystallographic orientation as the substrate (wafer). Also called Epi.

Epitaxy

Process by which a thin layer of single-crystal material is deposited on single-crystal substrate; epitaxial growth occurs in such way that the crystallographic structure of the substrate is reproduced in the growing material; also crystalline defects of the substrate are reproduced in the grown layer.

Etch

The process of removing material (such as oxides or other thin films) by chemical, electrolytic or plasma (ion bombardment) means.

F

FET

Field Effect Transistor, transistor in which output current (source-drain current)is controlled by the voltage applied to the gate which can be either an MOS structure (MOSFET), a p-n junction (JFET), or metal-semiconductor contact (MESFET); FET is an unipolar transistor, i.e. current is controlled by majority carriers only.

FTIR

Fourier – Transform Infrared Spectroscopy, material characterization method used to investigate composition of materials on the basis of the analysis of spectral absorption bands; uses Fourier transform spectrometer; samples must be transparent to infrared radiation.

Furnace

Tool used in semiconductor device manufacturing to process wafers at high temperature in the ambient of strictly controlled composition; uses heavy heating coils, and hence, does not allow rapid changes of wafer temperature; high thermal budget process; RTP is a low thermal budget alternative.

Furnace Horizontal

Furnace for high temperature processing of semiconductor wafers in which process tube is positioned horizontally and wafers are located in the boat vertically on their edges; used for thermal oxidation, CVD, diffusion, and anneals; batch processor; an alternative configuration: vertical furnace.

Furnace Vertical

Furnace for high temperature processing of semiconductor wafers in which process tube is positioned vertically and wafers are located horizontally inside the tube; superior to horizontal furnace in terms of heating uniformity, compatible with automatic wafer loading and footprint; warpage of horizontally supported wafers must be prevented; batch processor.

G

Gate

Structure used to control output current (i.e. flow of carriers in the channel) in the field effect transistor (FET); in MOSFET gate is comprised of gate contact and thin oxide; in MESFET gate is a Schottky contact; in JFET: metal and p-n junction.

Gate Oxide

The dielectric, usually oxide, layer that separates the gate terminal of a MOSFET from the underlying source to drain channel.

H

HDP

High Density Plasma – plasma featuring high concentration of free electrons, and hence, high concentration of ions.

HDPCVD

High Density Plasma Chemical Vapor Deposition. A deposition technique used to fill narrow (high aspect ratio) vias in semiconductor processing.

I

ICP

Inductively Coupled Plasma; high density plasma used in semiconductor processing; etching in particular.

Implanter

Tool used to carry out ion implantation processes.

Ion Implantation

A means for adding dopants to a semiconductor material. Charged atoms (ions) are accelerated in an electrical field into the semiconductor material. It is especially useful for thin doped areas. This process is much more precise than the diffusion method of doping.

J

JFET

Junction Field Effect Transistor; field effect transistor in which channel and its conductivity are controlled by changing width of the space charge region associated with a p-n junction.

L

Lithography

The transfer of a pattern or image from one medium to another, as from a mask to a wafer. If light is used to effect the transfer, the term, photolithography applies. Microlithography refers to the process as applied to images with features in the submicron range.

LPCVD

Low-Pressure Chemical Vapor Deposition, chemical vapor deposition process performed at reduced (less than atmospheric) pressure.

M

MBE

Molecular Beam Epitaxy, physical deposition process (basically evaporation) carried out in ultra-high vacuum (below 10-8 torr) and at substrate temperature typically not exceeding 800 °C; due to unobstructed (molecular) flow of species to be deposited and chemical cleanliness of the substrate surface highly controlled growth of ultra-thin epitaxial layers is possible; the highest precision deposition method used in semiconductor processing.

MEMS

Micro Electro Mechanical Systems micromachined in silicon; typically integrated with electronic microcircuits; generally fall into two categories of microsensors and microactuators; depending on application operation based on electrostriction, or electromagnetic, thermoelastic, piezoelectric, or piezoresistive effect.

MESFET

Metal Semiconductor Field Effect Transistor; FET with metal-semiconductor contact (Schottky diode) as a gate; allows implementation of field effect transistor with semiconductors which do not have high quality native oxide (e.g. GaAs), and hence, are not compatible with MOS gate approach.

Metallization

Metallization is the process of depositing a thin film of metal and patterning it to form the desired interconnection arrangement.

MOCVD (MOVPE)

Metal-Organic Chemical Vapor Deposition; usually refers to an epitaxial process and is more accurately known as MOVPE (Vapor Phase Epitaxy) or OMVPE. Process which uses metalorganic compounds as source materials; method often used in epitaxial growth of very thin films of III-V solar cells, optoelectronics and transistors.

MOSFET

Metal-Oxide-Semiconductor Field Effect Transistor; FET with MOS structure as a gate; current flows in the channel between source and drain; channel is created by applying adequate potential to the gate contact and inverting semiconductor surface underneath the gate; MOSFET structure is implemented almost uniquely with Si and SiO2 gate oxide; efficient switching device which dominates logic and memory applications; PMOSFET (p-channel, n-type Si substrate) and NMOSFET (n-channel,p-type Si substrate) combined form basic CMOS cell.

MTBF

Mean Time Between Failures, is the reciprocal of the sum of the failure rates of every component in a system.

N

N-type Semiconductor

A semiconductor crystal containing a small amount of dopant atoms that have one more valence electron that the other atoms in the crystal. These extra negative electrons can find no unoccupied bonds to bind them, so they are free to wander and constitute electric current. Common N-type dopants for silicon are phosphorus and arsenic.

O

OMVPE

Organometallic Vapor Phase Epitaxy

Oxidation

The chemical process of joining oxygen with another element. In semiconductors, oxidation means the joining of oxygen and silicon to form silicon dioxide (SiO2).

Oxide

Usually refers to silicon dioxide (SiO2) in semiconductor terminology.

Oxide Etching

The removal of silicon dioxide.

P

P-type Semiconductor

A semiconductor crystal containing a small amount of dopant atoms that have one less outer electron than the other atoms. Each dopant atom causes one unoccupied spot, called a hole, among the electrons that are bound in their orbits. The holes are positively charged and in effect move, constituting an electric current. Boron is a commonly used P-type dopant for silicon.

PECVD

Plasma Enhanced Chemical Vapor Deposition, low Pressure Chemical Vapor Deposition using RF energy.

Photoresist

A light-sensitive liquid that is spread as a uniform thin film on a wafer or substrate. After baking, exposure of specific patterns is performed using a mask. Material remaining after development resists subsequent etch or implant operations.

Physical Etching

Sputter etching; process of etching through physical interactions (momentum transfer) between accelerated chemically inert ions (e.g. Ar) and etched solid; anisotropic, non-selective.

Physisorption

The weakest form of adsorption resulting from purely physical attraction (van der Waals force) between the adsorbate and the surface; no chemical bond between the adsorbate and the surface is formed.

Plasma

An electrically conductive gas composed of ionized particles which are used to etch unwanted material through a chemical or physical bombardment process. Plasma etching takes place in a reactor, which may be of the barrel type or the planar type.

Plasma Etching

Dry etching in which semiconductor wafer is immersed in plasma containing etching species; chemical etching reaction is taking place at the same rate in any direction, i.e. etching is isotropic; can be very selective; used in those applications in which directionality (anisotropy) of etching in not required, e.g. in resist stripping.

Polysilicon

Polycrystalline silicon. Sometimes called poly. The form of silicon made of many small randomly-oriented crystals. Doped poly is a conductor of electricity and is often used as an alternative to metal in interconnecting devices on integrated circuits.

ppb

parts per billion

ppm

parts per million

PVD

Physical Vapor Deposition, deposition of thin film occurs through physical transfer of material (e.g. thermal evaporation and sputtering) from the source to the substrate; chemical composition of deposited material is not altered in the process.

R

Remote Plasma

Terms describing plasma processing mode in which wafer is located away from plasma, and hence, is not directly exposed to plasma; desired reactions (e.g. etching) are implemented by extracting ionized species from plasma and directing them toward the wafer; remote plasma process results in less surface damage than standard process as plasma generated ions are energetically relaxed arriving at the surface of the wafer.

RIE

Reactive Ion Etching, variation of plasma etching in which during etching semiconductor wafer is placed on the RF powered electrode; wafer takes on potential which accelerates etching species extracted from plasma toward the etched surface; chemical etching reaction is preferentially taking place in the direction normal to the surface, i.e. etching is more anisotropic than in plasma etching but is less selective; leaves etched surface damaged; the most common etching mode in semiconductor manufacturing.

RTCVD

Rapid Thermal Chemical Vapor Deposition; thermally enhanced CVD process carried out at high temperature, but for a very short time.

RTP

Rapid Thermal Processing; general term describing type of the process in which temperature of the wafer is rapidly increased by radiant heating from high-power halogen-quartz lamps; low-thermal budget process; useful in several applications in semiconductor device processing in which high temperature exposure is needed, but transfer of the large amount of thermal energy to the wafer is not desired.

S

SACVD

Selective Area Chemical Vapor Deposition; CVD process which deposits thin film material in selected areas on the wafer surface only; selectivity of deposition is controlled by chemical composition of the surface which can be locally altered.

Semiconductor

A material with properties of both a conductor and an insulator. Common semiconductors include silicon and germanium.

Source

One of three terminals in Field Effect Transistors; a heavily doped region from which majority carriers are flowing into the channel.

Spinning

The process used to apply the photoresist to the wafer surface.

Stripping

Process of material removal from the wafer surface; typically implies that removal is not carried out for the pattering purpose, e.g. resist stripping in which case entire resist is removed following lithography and etching.

T

TEOS

Tetraethyl Orthosilicate, Si(OC2H5)4; gaseous compound commonly used in CVD of SiO2 processes (so-called TEOS Oxide); good conformality of coating; relatively inert material, liquid at room temperature; thermally decomposes at around 700 °C to form SiO2; plasma enhancement lowers temperature of deposition to below 500 °C.

TiN

Titanium Nitride, conductor (resistivity 30-70 microohm-cm) used in silicon technology as a barrier separating silicon and metal contact; high melting point (2950 °C); deposited by LPCVD.

TLV

Treshold Limit Value

U

V

Veraschen

Entfernen (durch Verflüchtigen) organischer Materialien (z. B. Photoresist) von der Waferoberfläche durch starke Oxidation; z. B. Veraschung im Sauerstoffplasma.

Via

A path filled with conducting material between circuit layers.

Verbindungshalbleiter

Halbleiter aus einer Verbindung mehrerer Elemente; Verbindungshalbleiter kommen in der Natur nicht vor; sie werden aus Elementen der Gruppen II bis VI des Periodensystems synthetisiert, z. B. aus den Gruppen III und V (III-V-Verbindungen) oder II und VI (II-VI-Verbindungen).

W

Wet Etching

Etching process in semiconductor processing relying on chemical reaction in the liquid phase; highly isotropic but can be very selective.